| Μέρος αριθ | Κατασκευαστής | Εφαρμογή |
|---|
| ISPLSI2064E-200LT100 | Lattice | 200 MHz in-system prommable superFAST high density PLD |
| M5-320/192-20AI | Lattice | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| ISPLSI5384VA-100LB208 | Lattice | 100 MHz in-system prommable 3.3V superWIDE high density PLD |
| ISPLSI3256A-90LQ | Lattice | In-system programmable high density PLD, 128 I/O pins, 11000 PLD gates, 384 registers, 90MHz |
| ISPLSI8840-110LB432 | Lattice | 110 MHz 3.3V in-system prommable superBIG high density PLD |
| GAL22V10B-25QP | Lattice | High Performance E2CMOS PLD, 25ns, quarter power |
| M5-512/120-5HC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A3-384/160-10YC | Lattice | 10ns high performance E2 CMOS in-system programmable logic |
| M5-320/184-12HC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A3-64/64-10VI | Lattice | 10ns, 3.3V high performance E2 CMOS in-system programmable logic |
| M5LV-256/104-5VC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH215-20JC | Lattice | High-density EE CMOS programmable logic, 32 output macrocells, 32 outputs, 38 inputs, 64 flip-flops, 20ns |
| M5LV-128/104-10YI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH230-20JC | Lattice | High-density EE CMOS programmable logic, 128 macrocells, 64 outputs, 70 inputs, 128 flip-flops; 4 clock choices, 20ns |
| M5LV-128/120-10YI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| ISPLSI5512VA-70LB388I | Lattice | 70 MHz in-system prommable 3.3V superWIDE high density PLD |
| GAL20V8B-25LP | Lattice | High performance E2CMOS PLD generic array logic, 25ns, low power |
| ISPLSI3256-70LG | Lattice | High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 77MHz |
| ISPLSI1032E-70LJI | Lattice | In-system programmable high density PLD, 15ns |
| M5LV-128/74-5VC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH435-12JC | Lattice | High-density EE CMOS programmable logic, 128 macrocells, 12ns |
| M4LV-192/96-12VC | Lattice | High-performance E2CMOS in-system programmable logic, 3.3V Vcc, 192 macrocells, 96 I/Os, 12ns |
| ISPLSI2192VE-135LB144 | Lattice | 135 MHz 3.3V in-system prommable superFAST high density PLD |
| GAL22V10B-25LP | Lattice | High Performance E2CMOS PLD, 25ns, low power |
| M5-256/104-15YI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| PALCE20V8Q-25JC/4 | Lattice | EE CMOS universal programmable array logic, 25ns |
| M5-192/68-20YI | Lattice | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| GAL20V8B-25QPI | Lattice | High performance E2CMOS PLD generic array logic, 25ns, quarter power |
| GAL22V10D-25LP | Lattice | High Performance E2CMOS PLD, 25ns, low power |
| M4-128/64-7YC | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 128 macrocells, 64 I/Os, 7ns |
