| Μέρος αριθ | Κατασκευαστής | Εφαρμογή |
|---|
| GAL16V8D-15QP | Lattice | High performance E2CMOS PLD |
| ISPLSI2032VE-225LB44 | Lattice | 225 MHz 3.3V in-system prommable superFAST high density PLD |
| M4LV-128N/64-15JC | Lattice | High-performance E2CMOS logic, 3.3V Vcc, 128 macrocells, non-ISP, 64 I/Os, 15ns |
| M5-128/104-15YC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-320/160-6YC | Lattice | 6ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A3-256/128-65FAC | Lattice | 6.5ns high performance E2 CMOS in-system programmable logic |
| M5LV-512/120-15YC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-320/160-10YI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-384/184-5HC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-320/120-7HC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-512/256-12AC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-512/160-5HC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| PLSI1032-90LJ | Lattice | High-density programmable logic, 12ns |
| GAL6002B-20LP | Lattice | High performance E2 CMOS FPL generic array logic |
| MACH210-24JI | Lattice | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 24ns |
| M5LV-384/120-10YC | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A5-96/48-12VI | Lattice | 12ns, 3.3V high performance E2 CMOS in-system programmable logic |
| M4A5-64/32-10VC | Lattice | 10ns, 3.3V high performance E2 CMOS in-system programmable logic |
| MACH210AQ-20JC | Lattice | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 20ns, input pull-up resistors, quarter power |
| M5-256/160-5YC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4-128N/64-7JC | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 128 macrocells, non-ISP, 64 I/Os, 7ns |
| MACH210A-7JC | Lattice | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 7ns, input pull-up resistors |
| MACH231SP-15YC | Lattice | High-performance EE CMOS programmable logic, 128 macrocells, 64 I/Os, in-system programmable, 15ns |
| M5LV-512/160-15YC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-384/160-12HC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A3-64/32-10VI | Lattice | 10ns, 3.3V high performance E2 CMOS in-system programmable logic |
| GAL16V8D-5LJ | Lattice | High performance E2CMOS PLD |
| M5LV-256/104-15VI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| PLSI3256-70LG | Lattice | High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 77MHz |
| M4LV-256/128-10YC | Lattice | High-performance E2CMOS in-system programmable logic, 3.3V Vcc, 256 macrocells, 128 I/Os, 10ns |
