| Μέρος αριθ | Κατασκευαστής | Εφαρμογή |
|---|
| M4-32/32-10JI | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 32 macrocells, 32 I/Os, 10ns |
| MACH211SP-12JI | Lattice | High-performance EE CMOS programmable logic, 64 macrocells, 32 I/Os, in-system programmable, 12ns |
| GAL16LV8D-3LJ | Lattice | Low voltage E2CMOS PLD generic array logic, 3ns |
| MACH131SP-15YC | Lattice | High-performance EE CMOS programmable logic, 64 macrocells, 64 I/Os, in-system programmable, 15ns |
| M5LV-512/256-20AI | Lattice | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-256/74-7VI | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-256/104-10YI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| ISPLSI2128VE-135LQ160 | Lattice | 135 MHz 3.V in-system prommable superFAST high density PLD |
| M5-256/160-10YI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-384/184-10HI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| GAL18V10B-15LJ | Lattice | High performance E2CMOS PLD generic array logicTM (96 x 36), low power, 15ns |
| M4-128N/64-10JC | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 128 macrocells, non-ISP, 64 I/Os, 10ns |
| M5-256/160-12YC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4-32/32-12VC | Lattice | High-performance E2CMOS in-system programmable logic, 5-V VCC, 32 macrocells, 32 I/Os, 12ns |
| M4LV-96/48-18VI | Lattice | High-performance E2CMOS in-system programmable logic, 3.3V Vcc, 96 macrocells, 48 I/Os, 18ns |
| M5-512/120-10HC | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-192/104-5YC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-320/120-7HC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4LV-128N/64-12JC | Lattice | High-performance E2CMOS logic, 3.3V Vcc, 128 macrocells, non-ISP, 64 I/Os, 12ns |
| MACH111SP-7JC | Lattice | High-performance EE CMOS programmable logic, 32 macrocells, 32 I/Os, in-system programmable, 7.5ns |
| M4-128/64-10YC | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 128 macrocells, 64 I/Os, 10ns |
| M5-512/160-12HC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-320/192-6AC | Lattice | 6ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| GAL22V10D-15LJI | Lattice | High Performance E2CMOS PLD, 15ns, low power |
| ISPLSI2032E-225LJ44 | Lattice | 225 MHz in-system prommable superFAST high density PLD |
| MACH221-18JI | Lattice | High-performance EE CMOS programmable logic, 96 macrocells, 48 I/Os, 18ns |
| GAL18V10-20LP | Lattice | High performance E2CMOS PLD generic array logicTM (96 x 36), low power, 20ns |
| ISPLSI2032E-180LT44 | Lattice | 180 MHz in-system prommable superFAST high density PLD |
| M5LV-320/120-15HI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| ISPLSI2128VL-135LT100I | Lattice | 135 MHz 2.5V in-system prommable superFAST high density PLD |
